1. Field of the Invention
The present invention relates to a content addressable memory (associative memory, also referred to as CAM hereinafter) having an error correction capability.
2. Description of the Background Art
Generally, the CAM is called associative memory having the capability of reading data from a physical address like RAM (Random Access Memory) and ROM (Read-Only Memory) for example as well as the capability of searching for data on a memory array that has the same value as that of input data to output the physical address of the matching data or output a detection signal.
The CAM is used widely in such applications as address conversion for asynchronous transfer mode (ATM) and high speed IP (Internet Protocol) for example and is used versatilely in various fields.
Here, it is supposed that, in a memory array of a CAM, a bit error is caused by a hardware failure. In this case, even if data with correct content is input, the input data does not match the data having the bit error. Although the memory should normally output the match result, actually a desired output cannot be obtained.
Regarding this issue, Japanese Patent Laying-Open No. 2003-316662 discloses that, rewriting of data stored at an address having such a bit error is inhibited, or mask control is performed by excluding the address having the bit error from addresses to be searched for, so as to efficiently search for data. Thus, the CAM is required to ensure the good quality of the device and high data reliability.
In addition to a bit error due to a hardware failure, an error could occur when such natural radiation as α radiation and neutron radiation is incident on a CAM chip to generate positive hole pairs in a silicon substrate and thereby break data held on a storage node of a memory cell in the worst case. Such an error is generally called soft error.
It is known that, as the capacity of a storage node holding data is smaller, the resistance to soft errors is lower. Occurrences of bit errors due to soft errors result in loss of reliability of the search result of the CAM as described above.
If a bit error occurs in a memory array of a CAM due to any hardware failure as described above, measures can be taken in advance to address the occurrence of the error, using such methods as those disclosed in the aforementioned publication. However, it is difficult to prepare any measure to address the occurrence of a bit error caused by a soft error that occurs in a later stage.
In particular, with the recent advances in semiconductor process technology, namely downsizing technology, the size of a memory cell itself has been decreasing and accordingly the capacity of a storage node holding data has gradually been decreasing. Thus, there is a tendency that the bit error rate due to soft errors increases.